"The threat [of GlobalFoundries] is real and we’re going to fight them like we never fought before." These were the words of one of TSMC insiders we spoke in the light of recent announcement at VSLI 2009 conference in Kyoto, Japan.
With GlobalFoundries announcing its High-K breakthrough development going down to 22nm and below, TSMC knows that the foundry has to react to stay on top of its game. On VLSI 2009, TSMC announced 28nm low-power technology extending the Silicon Oxynitride [SiON]/poly usage using dual or triple gate oxide process. This low-power technology should help with deploying 28nm as a full node. Yes, you’ve read that correctly. While the usual industry nomenclature dictates that 28nm process is treated as 32nm half-node, TSMC is focusing on 28nm rather than 32nm, pushing all the available resources on getting 28nm before GlobalFoundries.
This is a very aggressive schedule, and with all the problems TSMC had with 40nm half-node [again, TSMC didn’t exactly deploy 45nm – they went straight for 40nm] – there is a mist of doubt above TSMC’s ambitions. Brits would say that the proof is in the pudding, and TSMC proved its 28nm capabilities by demonstrating a 28nm wafer with 8MB SRAM structure in dual/triple oxide SoC technology. The demonstrated cell was measured at 0.127 micron squared with a raw gate density as high as 3900k gate/mm2.
When comparing to the 40nm technology, TSMC cited improvements in the range of anywhere between 25-40% in clocking, and around 30-50% power reduction. This should enable significant clock jumps and a performance jump from one generation to another. Bear in mind just one thing. GT200 chip with 1.4 billion transistors was 576mm2 in 65nm, 470mm2 in 55nm or can be just 150-160mm2 big in 28nm process. This would put a graphics card with 1TFLOPS of performance in a size almost good enough for implementation into a motherboard, or as a $50 graphics card.
TSMC just may be on a road to redemption, after costing ATI and nVidia valuable time with all the issues regarding 40nm.