ARM announces Cortex-A5 for the next 15 billion cellphones and MIDs


We spoke with Travis Lanier, Product Manager at ARM, about the just announced Cortex-A5. The A5 continues the development of the Cortex family. Last month, ARM announced their Cortex-A9 MP which will initially be built on 40nm at TSMC, and are expected to seamlessly transition to 28nm. Earlier this month, ARM announced a partnership with GlobalFoundries for 28nm development of the ARM Cortex IP, meaning that ARM is expanding its focus to two foundries.

Lanier gave a bit of background on the Cortex family of processors. The unifying feature of Cortex is Thumb-2 instruction set. The Thumb-2 instruction set combines 16- and 32-bit instructions to improve code density and performance, in a similar way like modern 64-bit processors from AMD and Intel can perform either an 64-bit instruction or two 32-bit ones [in some cases, three 32-bit ones]. The original ARM instruction set consists of fixed-length 32-bit instructions, while the original Thumb instruction set employs 16-bit instructions.

Lanier said that in creating Thumb-2, ARM added about 130 additional instructions to Thumb. The reason for adding the new instructions was to remove the need to switch between ARM and Thumb modes in order to service interrupts, and to give access to the full set of processor registers. A complete explanation of Cortex features can be found in Lanier’s 2005 article Architecture and Implementation of the Cortex-A8 Microprocessor.

The Cortex-A5 SoC [System on a Chip] is designed to make the next generation of entry level mobile phones comparable to today’s smartphones. The Cortex-A5 will replace the older ARM11 and ARM9 with an IP that has all the features of the Cortex-A8 and A9. Compared to the older ARM processors, the A5 will deliver more performance with less CPU area and be more power efficient per milliwatt [a unit of power equal to one thousandth of a watt].

ARM Cortex-A5 Slide 11: Performance, Area, Power
If you take a look at the slide, you can see that A5 succeeds ARM11 and ARM9 architectures

The Cortex-A5 IP is available as 1-4X SMP (symmetric multiprocessor). He said that the Quadcore Cortex-A5 will deliver 8.5 CoreMarks per MHz and is capable of achieving efficiency as high as 10 CoreMarks per milliwatt. Lanier then talked about the Cortex-A5 versus Intel’s Atom CPU Core. Hesaid the Atom will need to be manufactured at 15nm to match the siliconarea of the Cortex-A5 in today’s 45nm process. As a comparison, take a look at picture below – it shows a CoreTex-A5 compared to today’s 45nm Intel Atom.

ARM's slide comparing Cortex-A5 to Intel Atom CPU core
ARM’s slide comparing Cortex-A5 to Intel Atom CPU core

Truth to be told, we don’t like seeing these kind of comparisons, the Cortex-A5 illustration does not come with the complete elements, and mentions only one core – a quad core setup would easily capture 25% of single Atom die [note: Intel’s Dual-core Atom is a MCM-Multi Chip Module, thus you need to double the illustration, Ed.]. Secondly, Cortex-A5 core is additional 10% smaller due to use of 40nm process, rather than 45nm.

Running at 1GHz the Quadcore Cortex-A5 will most likely be paired with a single Mali GPU – in a complete ARM environment. Customers can also opt for PowerVR MBX or SGX graphics [nVidia selected Cortex-A9 for their next generation Tegra part, so no GeForce subsystem can be combined]. Lanier also said that partners going after the MID [Mobile Internet Device] space would most likely use a Cortex-A9, but it is possible they may use a quad core Cortex-A5. A quad core version would certainly have enough performance and offer a very low power option for a low-cost handheld device that has Internet access.

Cortex-A5 briefing: Compelling user value
ARM won over 100 design wins for Cortex-A5, with phones being launched on MWC 2011 in Barcelona

The Cortex-A5 has the same feature set as the A8 and A9. It comes with NEON multimedia and signal processing technology. Thus, it has a 35 percent performance increase for decoding H.264 video over the ARM11. The A5 also has TrustZone security extensions allowing support of secure financial transactions. The Cortex-A5 will take advantage of the TSMC 40LP libraries and proven development tools.

Looking into application of the A5 architecture, succeeding ARM11 and ARM7 gives some really interesting names – given that ARM shipped well over 7 billion ARM11 and ARM7 processors, applications vary from a $10 cellphone to handheld gaming consoles or phones that want to rival ARM7-based Nintendos, who elected Cortex-A9 based Tegra for their next-gen handheld device.

ARM Cortex-A5 product positioning
ARM Cortex-A5 is targeting to be the chip inside phones that don’t require power given by A8 or A9 SoCs.

ARM IP has powered over 15 billion devices and they claim they will sell another 15 billion in the next four years. Clearly, the Cortex-A5 IP is going to give ARM greater leverage in the low-power embedded CPU marketplace. This architecture is a market leader and the company has to focus now on building the developer supporting infrastructure, if ARM ever wants to stand on their own feet and go against large players such as Intel, AMD, IBM and others. From what we are seeing, ARM doesn’t want to rely on expertise from nVidia, Qualcomm, Texas Instruments and the like, but works on building the developer infrastructure themselves.