SSDs Finally Do Fly : The Search for SoC Memory

The Non-Volatile Memory Conference held last Wednesday in Santa Clara proved to be a rich resource on the current state of affairs within the non volatile memory industry. The long expected NAND-Flash growth ramp in Solid State Disks [SSD] has finally begun. Adding the high usage rates within the mobile electronics space yields a market forecast that nearly doubles each year for the next two years reaching nearly $9 Billion in 2012.

Flash End Near?
A presentation by Spansion stated that flash memory will not have enough electrons on the storage element for the technology to work beginning at 128 Gbs. Though there is a lot of truth to this, leading flash suppliers are pursuing other non volatile memory technologies but have yet to reveal their plans. The message you get depends on who you are talking to? also realize that competing non volatile memory technologies need to displace flash to gain market space.

Phase change memory is attempting to compete for flash sockets but has yet to show any real success in the marketplace. Phase change proponents, having failed to meet commitments, are beginning to lose the all important mind share argument and are beginning to fade as a storage class memory contender.

Storage Class Memory Background
Storage Class Memory stems from a 2008 IBM whitepaper entitled ?Overview of candidate device technologies for storage-class memory? in which the different non volatile memory technologies were reviewed and ranked for viability as future replacement candidates for hard disk drives [Table 1 & Figure 1].

Source: IBM
IBM?s whitepaper has had a pivotal effect providing manufacturers and technology developers alike with a basic requirements set. SCM is now universally used to denote those requirements.

Disruptive Technologies – Sustaining – Evolutionary?
All useful words, especially when the outcome amongst multiple entries remains unknown. At this point it?s useful to remember that the best technology does not necessarily always when, only that which is sufficient and has the necessary cash and staying power behind it.
Only one technology will become dominant in the next generation of stand-alone non volatile memory. The technology could just as easily be the next generation of flash though it?s becoming evident that flash has had its run. No matter what technology is chosen it will need to scale with voltage and geometry while showing equal if not superior performance at lower power. And don?t forget that price will always be the deciding factor when it comes to commodity memory.

Actual Device Being Prepped for Market!
Adesto Technologies Corporation [Sunnyvale, CA] announced something no one was expecting. They?re in the yield improvement phase of their first merchantable device preparing to sample the device in the first quarter of 2011. The Conductive-Bridge RAM [CBRAM] memory is based on Programmable Metallization Cell [PMC] technology licensed from Axon Technologies Corporation, Phoenix, Az. Axon has also signed non-exclusive licenses with the formerly known Infineon Technologies AG [2004] and Micron Technology Inc. [2001].

The PMC uses a solid state electrolyte [chalcogenide material] that has the ability to dissolve large amounts of metal ions within the matrix. The metal ions under the right voltage bias conditions align to form a metal ion, low resistance pathway through the matrix or a ?conductive bridge? [<10K Ohms]. Reversing the bias voltage effectively breaks the conductive bridge returning the cell to the high resistance state [>400K Ohms].
The device consists of a pin for pin drop in replacement for a 1Mb EEPROM manufactured using a standard foundry 130nm process but requires copper at the Back-End-Of-Line [BEOL]. This is called a ?bolt on? technology requiring only two non critical masks in BEOL steps. Adesto?s foundry partner remains under wraps.
The layout is fairly standard DRAM style using Bit Lines [BL] and Word Lines [WL] to select the cell through an NMOS pass transistor. The companies focus is the minimization of risk by focusing on a cell concept with the lowest barrier for implementation. The DRAM style cell is directed toward replacing NOR Flash, Ultra Low Power DRAM, Embedded Flash and Embedded DRAM. The cell size [DRAM rule] is 8F2 to 6F2. They can also adapt the CBRAM as a Diode Access device reducing the effective cell size to 4F2. The Diode Access device is directed toward NAND replacement and the Mass Storage markets.

Adesto specs data retention at 10 years – 70 Celsius with device endurance greater than 10 E5 cycles. Write Voltage is less than 1.6 Volts eliminating the high voltage requirement for flash or EEPROM. Operating voltage is 1.0 Volts. Programming requires 5 uSec per cell at less than 60 uA. Erase requires 10 uSec per cell at less than 60 uA.

Adesto has claimed that they have a 50% cost advantage over standard flash and the ability to easily accommodate 4 bit multi level cells [MLC] as well as the ability to stack arrays for the NAND and Mass Storage cost constrained marketplaces.

Adesto?s business model is to pursue a mixed product and licensing business strategy. They desire strong penetration in various markets with multiple partners. The target markets include Flash Memory, Embedded Memory, Low Power DRAM and Mass Storage. There investors include Applied Materials, ATA Ventures, Adams Street Partners, and Harris & Harris Group.

SoC Dreams
Adesto?s plan is extremely conservative. Entering the market with a lowly serial EEPROM/flash entry point allows them to learn how to manufacture the part using highly available older geometry fabs so there?s no loading questions entering the equation and facilitates a steady supply of product. Entering the market with a device that has a wide supply base insures that problems associated with learning curves concomitant with new processes do not adversely affect end customers goes long in demonstrating the shrewd decision making this company is capable of.
I?ve been following them since there formation. Two things really make the company a stand out; one, they are the very definition of stealth and two, they meet their schedules.
Low power non volatile memory on SoC is now a step nearer to realization. Adesto is a must watch company?