IBM, Global Foundries Moving to Gate-Last Technology for 20nm


This past Tuesday, at the Common Platform Alliance Conference, Dr. Gary Patton, vice president of IBM’s semiconductor research & development center, made a major announcement for the Alliance partners – IBM, Samsung and Global Foundries.

While the plan to use Gate-First technology at the 32/28 nanometer node will remain unchanged, the coalition will move to Gate-Last technology when it makes the jump to 22 and 20 nanometer production.

We are sure everybody at 2200 Mission College Blvd., Santa Clara (Intel’s headquarters) and TSMC in Taiwan broke out in a big smile. In the fab industry timeline there was a switch in 2004/2005 to High-K Metal Gate at the 45 nanometer node which enabled resuming the electrical gate dielectric scaling, while reducing the gate leakage by more than ten times.

Intel was the leader at putting this technology into volume production, next came TSMC and AMD. Intel favored the Gate-Last approach and so did TSMC. The original Common Platform partners were following IBM’s R&D leadership with Gate-First. The difference between the two technologies lies in the timing when the metal electrode is deposited, before or after the high temperature activation anneal (over 925 degrees Celzius) of the flow.

In theory, the Gate-First approach lets the fab and their customers transition to a lower manufacturing node without having to redesign their chips. This is a major time saver and cost reduction for chip designers to make the move from 65 to 45 to 32 nanometer production process.

The Common Platform Alliance is based around reducing the cost of chip R&D and fabrication. It came about with IBM and Samsung researching the 90 nanometer process technology. The first keynote speaker on Tuesday was Samsung’s Dr. Stephen Woo, president and general manager of their LSI Division.

Global Foundries manufacturing plant in Dresden, Germany.

Woo explained the cost for the 20 nanometer process at about $1.4 billion to develop, and that’s excluding the cost of building a fab. On the upcoming nodes, building a fab will cost more than the $4.2 billion GlobalFoundries has allocated for constructing their Fab 8 – Saratoga County, New York facility which is coming online in 2012.

Woo said the Alliance customers will spend several years and tens, if not hundreds, of millions of dollars designing a new chip. He said, today there are seven foundries working on 32/28 nanometer node technology. When the industry transitions to 22/20 nanometer technology Woo said he only saw four foundries that are capable of making that major technology shift.

According to Jon Carvill, VP of GlobalFoundries Communications, the change from last year’s Gate-Last to this year’s Gate-First is "due to the design rules and desired scaling our customers want at 20nm. Gate Last was the best option to hit it and Gate First was the better option at 32/28nm."

September 2010 Gate-First approach was the only option offered by GlobalFoundries.

"We have multiple customers engaged on Gate First 32nm/28nm as does Samsung (who made this disclosure with us yesterday)," Carvill concluded.

Now that Samsung and GlobalFoundries are shipping 40 nanometer-LP wafers and showing production wafers for 32 nanometer SOI, 28 nanometer-HP, 40 nanometer-G and 28 nanometer-SLP, their management and scientists decided there was more than enough time to begin work on the 20 nanometer Gate-Last transition. Gate-Last technology is supposed to offer a better choice of transistors for high performance.

Pictured above: A 20 nanometer LP High-k Metal Gate wafer

The graphic for the production timeline showed the Process Design Kit is scheduled for next month, with their Multi-Project Wafer shuttle to arrive by summer of 2011. It also revealed an estimated "risk production" by summer of 2012 and "early production" in the first quarter of 2013. That could translate into an ARM IP-based, Cortex A-15 quad-core chip built with 20 nanometer technology showing up in smartphones, tablets, netbooks and entry-level desktop computers by CES 2014.

As of our publication deadline neither the press people from Common Platform nor Global Foundries were able to provide promised reference and visual materials. There are a huge number of leading edge slides we hope will become available, since photography was curtailed at the event by the Alliance’s minders.