Business, Enterprise, VR World

Samsung's V-NAND Chips Breaks Limits

Samsung has revealed the next generation of its revolutionary 3D NAND flash memory technology.

Samsung, in a keynote presentation at the Flash Memory Summit 2014, launched its newest V-NAND 3-bit/Cell flash memory technology. This was not long after the South Korean tech giant unveiled its new 850 Pro SSDs last month, which feature the second generation V-NAND 2-bit/Cell flash memory technology.

V-NAND is currently touted by Samsung as the next step after NAND flash, as it features what is known as 3D NAND cell structuring. The technology exceeds the perceived limitations of planar NAND flash by stacking multiple memory cells on top of one another. The very first V-NAND 2-bit/Cell chip, which was revealed about a year earlier, featured 24 stacks of memory cells. The new cell configuration exponentially boosted its overall processing capabilities, surpassing the performance of memory flash chips using the same planar area.

The introduction of the new V-NAND 3-bit/Cell flash memory chip opens the technology to its third generation level. While it uses the same 32-stack memory cell structure that the recent second generation 850 Pro has, it goes a few levels higher by using a 3-bit/Cell design.  This means that every layer within the stack would be at least 3-bit ‘thick’ for each cell. The new configuration would technically have an average spec equivalent of a 48-stack configuration that uses a 2-bit/Cell design.

As far as raw performance goes, this means that the new V-NAND 3-bit/Cell chips are even more error read resistant than other previous V-NAND chips. Save for its current manufacturing issues, the drastically increased memory density of 3-bit V-NAND chips would also make it possible to lower the cost of SSDs further while increasing maximum storage capacities.

Samsung looks into developing 3D NAND technology further as the chips increase its memory density by adding more layers. The company is even confident that it would be capable of the designing 100-stack V-NAND memory chips in the next couple of years.