Analysis, Breaking, CPU, Hardware

Next Gen Processor Performance Revealed

Soft Machines Virtual Core concept.

There is a trend of large companies snapping up smaller chip designers, all at the time when several next=generation processor designers are starting to exit stealth modes and gain traction. Over the last couple of months, companies such as Amazon, Apple, Google, Microsoft, Oracle – all have acquired at least one promising hardware designer or manufacturer.

Soft Machines is one of the ‘new kids on the silicon block’, planning to do a ‘one up’ and build all-new processing architecture. Variable Instruction Set Computing or VISC is their brainchild, and on paper, we’re talking about a seriously efficient and flexible processor architecture which just may take sweep the rug under the dominating ARM and x86 architectures.

Dynamic Resource Scaling – VISC’s Secret Bullet?

Every processor architecture on the market is built with significant compromises. Our hunger for content consumption and production lead chip designers to inherently design products, and steer architectural design where you become ‘Jack of all Trades, Master of None’. Take a look into x86 architecture, which originally used CISC (Complex Instruction Set Computing), only to switch to RISC with a CISC wrapper once legendary DEC Alpha 21264 processors showed that a RISC processor can run a CISC in emulator faster than a native CISC processor.

Virtual Core shows dynamic resource allocation for VISC architecture. More efficient than Intel?

Virtual Core shows dynamic resource allocation for VISC architecture. More efficient than Intel?

VISC from Soft Machines is trying to do this exact switch, by launching a variable instruction set, claiming a 2-4x performance/watt advantage over conventional ARM and x86 architectures. By virtualizing all the available computing resources on a processor level, Soft Machines wants to bring virtualization to silicon level, and allocate resources from one to 16 Virtual Cores, with up to eight physical cores per virtual core. In order to simplify this, take a look at product roadmap below:

SoftMachines Roadmap 2015-2018; from 28 to 10nm

SoftMachines Roadmap 2015-2018; from 28 to 10nm

Last year, Soft Machines managed to tape out two chips – proof-of-concept processor and SoC reference design, all using the 28nm process at the foundries which fund their development. During this year, the company plans to introduce high-performance processors named Shasta, Shasta+ and Tahoe, while SoC are single-chip designs geared towards mobile and industrial (automotive, airline, defense) usage.

2016 should see a 2GHz processor with four physical, two virtual 64-bit cores, or a multi-chip package with two Shasta dies. Large-scale volume shipments and hitting the microserver market in large numbers should occur around 2018, with 8-16 virtual core designs hitting the demanding market.

Processor concept remains the same, regardless of the industry, and we can see that the company is focusing on delivering significant volumes once 10nm process matures at GlobalFoundries and Samsung Semiconductor.

VISC Processor Performance Results

Thanks to Simon Solotko, we managed to get our hands on initial performance tests done on Proof-of-Concept silicon, which was manufactured in 28nm HKMG process. All the benchmarks were done using SPEC2006, an industry standard benchmark for processor architectures (ST Energy and overall FLOPS/Watt calculation).

Soft Machines VISC Shasta, Shasta+ and Tahoe cores tested in SPEC2006 ST Energy benchmark.

Soft Machines VISC Shasta, Shasta+ and Tahoe cores tested in SPEC2006 ST Energy benchmark.

 

Single Thread SPEC2006/Watt

Single Thread SPEC2006/Watt

As you can see for yourself, some numbers had to be extrapolated as tested processors could not reach the clock speeds needed for an apple-to-apple comparison (Apple A9X), but if all goes according to plan, Shasta can deliver 48 FLOPS in under 4,600 mWatts (4.6W), while for example Intel Sklylake consumes 6.8W to deliver 27 FLOPS.

Why is Soft Machines Important?

While still a startup, Soft Machines attracted several heavy-weight backers, which are enabling quick development and plasn to lead the market adoption into hundreds of millions of devices. We’re talking about several familiar names – AMD, GlobalFoundries and Samsung.

For example, Soft Machines could easily become adopted by AMD APUs and GPUs, as recent moves enabled AMD to introduce different ISA (Instruction Set Architecture) products with a similar concept design. AMD’s x86-64 and ARM Cortex-A53 / custom K12 core designs all use similar L1 to L2 to L3 to DDR3/4 SDRAM or upcoming HBM SGRAM and then DDR4 SDRAM principle.

Thus, we would not be surprised to see VISC architecture becoming a part of GPU and CPU products from AMD. Samsung is no different – the company got the ‘first blood’ with Alpha-based processors and have shipped billions of chips based on different processor architectures – 32- and 64-bit ARM cores inside their Exynos and Apple AX processors, as well as numerous MIPS-based chips for industrial usage. Given that Samsung Semiconductor is the world’s largest semiconductor manufacturer, and fellow investor GlobalFoundries is now the third largest, there’s no fear for Soft Machines ability to tape out and produce prototype and final silicon.

  • BaronMatrix

    Wow, this is crazy… But Intel needs to be taken out…