Back on CES 2016, Jen-Hsun Huang unveiled the Nvidia DRIVE PX 2, a mobile supercomputer which now serves as a base for development of self-driving vehicles from the likes of Volvo, BMW, Mercedes-Benz, General Motors and many others. DRIVE PX 2 comes with an impressive set of specifications, which are delivering no less than 24 TOPS and 8 TFLOPS SP performance.
The first DRIVE PX 2 system delivered to the customers actually used Maxwell-based MXM modules, i.e. it used a combination of first generation Pascal-based Tegra silicon with a known value, the GM206 graphics processor. Fast forward to three months later, Jen-Hsun was back on the stage showcasing DRIVE PX 2 once more. This time around, it featured an actual Pascal silicon – based on the GP106 graphics processor. After the keynote ended, Nvidia moved the board into an acrylic case at its Automotive Showcase, where we could see the first glimpse of dual Pascals.
“Tegra processor uses UMA (Unified Memory Architecture) and attaches to 8GB LPDDR4 memory in dual-channel configuration, achieving approximately 51.2 GB/s. This was achieved by using the fastest configuration possible: 128-bit interface connects to two memory chips which can achieve 25.6 GB/s per single chip. This is more than the highest bandwidth figures a desktop Skylake-based processors achieve on desktop and mobile (i7-6700K with DDR4-2133: 34.13 GB/s, DDR4-2666: 42.66 GB/s).”
DRIVE PX 2 Specifications
- Dual Next-Gen Tegra SoC, 16nm
- Dual-Core Denver2 CPU
- Quad-Core ARM Cortex-A57
- Integrated Pascal
- 16 GB LPDDR4, 3.2 GHz
- Dual Next-Gen Pascal GP106 GPU, 16nm
- 1280 CUDA Cores
- 128/256-bit GDDR5/GDDR5X Interface
- 8 GB GDDR5
While the DRIVE PX 2 comes with an impressive CPU/GPU combination delivering serious horsepower,
Nvidia PG418 MXM board with GP106 GPU.
We attended the DRIVE PX 2 session during the GPU Technology conference, and during the Q&A session, it was said that DRIVE PX 2 features; “Discrete Pascal GPU is the entry-level, low-voltage part which uses 128-bit interface that connects to GDDR5 memory chips clocked at 1.25 GHz QDR for a total bandwidth of 80 GB/s. The clock can scale to 1.5 GHz QDR for a total of 96 GB/s.”
Now, as we can see from the picture above, the GP106 GPU actually features a 256-bit memory bus, not the 128-bit one. It might be that the company decided to cut down the number of lines going out of the GPU due to automotive purpose. The numbers simply do not add up for a fully-enabled GP106 chip. Furthermore, in an 8-chip configuration, this board features 4 Gbit (512 KB) Samsung GDDR5 memory modules which can be clocked from 4-7 Gbps i.e. from 1-1.75 GHz QDR (Quad Data Rate). As Nvidia representatives have said, DRIVE PX 2 version will never go above 1.5 GHz QDR (6 Gpbs).
If the chip had full 256-bits enabled, the bandwidth would double up to 160 GB/s. What we managed to find out is that out of 250W TDP (power limit) for the whole DRIVE PX 2 system, the GPUs can take up to 190W combined total, with the remaining 60W going to other components and two Tegra SOCs which now belong to the 15W TDP. The boards are currently being delivered to the automotive customers at a price of $15,000. Do note that this price is for the prototype system which can be cooled either by air or by a liquid cooled system.
