VR World

Network-on-a-Chip Improvement Revealed

MIT 36 Core Network Chip

Communication between cores on a computer chip becomes more and more difficult as the number of cores or processing units increases. Maintaining cache coherence, ensuring cores locally stored copies of globally accessible data is up to date is a problem that one set of researchers claims to have solved. A group led by Li-Shiuan Peh, MIT Singapore Research Professor of Electrical Engineering and Computer Science, brought a 36-core network-on-a-chip to the International Symposium on Computer Architecture. Her team’s experimental design uses an Internet like communication network to manage local memory stores. Each core has an associated router where data travels between cores in packets of