After launching Ultra family in 2014, and the UltraLite Family in early 2015 – Lattice just announced a new member of the iCE40 FPGA family. ICE40 Ultra Plus delivers eight times more memory (1.1 Mbit RAM), twice the digital signal processors (8x DSPs), and improved I/Os over previous generations. Available in multiple package sizes, the programmable nature of the iCE40 UltraPlus device is ideal for smartphones, wearable tech, drones, 360 cameras, human-machine interfaces (HMIs) and industrial automation, as well as security and surveillance products.
The variety of sensors needed to implement innovative HMI solutions are rapidly changing the I/O landscape. Today’s mobile devices require ever faster I/O speeds. The proliferation of low cost sensors over the past few years and the adoption of new, higher performance interfaces have increased the computational demands of these systems. So, too, has the escalating demand for always-on functionality. Sensors in a wide variety of applications ranging from drones, phones, wearables, and industrial equipment are constantly collecting a large amount of data. System designers need to speed up data processing time while reducing system power to maintain the consumer’s demand for a full day of device operation without re-charging.
DHP seems to be new energy-efficient approach of computing algorithms locally rather than in the Cloud using dissimilar processors instead of power-hungry APs. With this kind of approach, designers can use parallel processing techniques to address new demands for complex co-processing. With DHP, mobile system designers can perform repetitive number-crunching tasks locally on Digital Signal Processors (DSPs) that offer better power efficiency and frees the applications processor (AP) from some processing tasks, allowing it to remain in sleep mode longer to conserve system power and extend battery life.
At the heart of this new FPGA is Lattice’s highly power efficient iCE40 core, combining low power operation with extensive integrated functionality, including multiple 16 x 16 multiplier blocks, in an extremely small footprint. The new iCE40 UltraPlus builds on this foundation by providing all of the critical elements needed to support the most energy efficient parallel processing solutions for repetitive number crunching. Combining 1.1 Mbit of low power SP-SRAM, eight multiply/accumulate blocks for signal processing, up to 5280 LUTs for custom logic, and non-volatile configuration memory for instant-on applications, the iCE40 UltraPlus solution offers the ideal blueprint for designers building always-on sensor buffers, acoustic beamforming audio subsystems, and other repetitive compute heavy applications. This same device can also be used to support a variety of bridging, buffering and display applications to accelerate innovation in next generation mobile and industrial applications.
Potential applications for this kind of FPGA are virtually limitless. For example, many solutions in the wearable or white goods markets need a device that can serve as both a large frame buffer and an interface bridge. With its extensive on-chip SRAM, the iCE40 UltraPlus FPGA can support an always-on display while the AP remains in sleep mode. The FPGA offers a flexible fabric for custom graphics acceleration as well as I/O expansion by supporting MIPI DSI or parallel interfaces. This combination of a display driver and graphics engine mirrors the performance of a low cost GPU, but at significantly reduced power. At the end of the day, this FPGA can be used in Camera, Display, Audio, Data buffering and Signal aggregation based applications. The iCE40 UltraPlus device is also well suited for voice recognition, gesture recognition, image recognition, haptics, graphics acceleration, signal aggregation, I³C bridging and more. This also enables new ways of interaction with your mobile product in the future, such as eye tracking and more. Using this kind of technology in VR headsets and mobile phones would be groundbreaking.
